The present invention relates to a start-stop synchronous communication speed detecting apparatus used to, for example, detect a communication speed between a data terminal equipment (to be referred to as a DTE hereinafter), which is used in a data circuit terminating equipment (to be referred to as a DCE hereinafter), and the DCE.
In data communication using a DCE, a SET command is sometimes set as an extension command of a CCITT recommendation V. 25 bis "serial automatic calling protocol". In asynchronous communication, therefore, the DCE automatically detects a communication speed by receiving a "SET CR" (CR: carriage return) of IA5 characters from a DTE and performs reception of commands and transmission of indications with respect to the DTE in accordance with the detected speed. Therefore, the DCE requires detection of the communication speed by the "SET CR" received from the DTE.
In conventional start-stop synchronous communication speed detecting apparatuses of this type, a detection signal indicating the start of space polarity is generated, and a central processing unit (to be referred to as a CPU hereinafter) detects this detection signal and starts a timer. When a detection signal indicating the end of the space polarity is generated, the CPU stops the timer and calculates a communication speed by software in accordance with the timer value. The CPU controls a serial interface LSI to enable reception of characters subsequent to the space polarity and fetches the received characters. After checking whether the fetched characters constitute a character string for communication speed automatic detection, the CPU controls the serial interface LSI again.
In the above conventional start-stop synchronous communication speed detecting apparatus, however, since software dependency is high, software for processing occupies the CPU at the start and end of the space polarity and at the time of character reception. Therefore, an operating ratio in other operations to be executed by the CPU is reduced. In addition, when the communication speed is increased, control of the serial interface LSI performed at the end of the space polarity sometimes lags behind reception of characters subsequent to the space polarity.